A NEW KIND OF CHIP
FOR CRYPTOGRAPHY


In a world where progress often comes at the cost of security, our hardware-accelerated cryptography redefines the paradigm. We're enabling real-time, high-performance systems where privacy is the default, not the exception.

Welcome to a world beyond trust.

> Our Origin Story

EXPANDING THE FRONTIERS OF CRYPTOGRAPHY

Modern cryptography has been the guardian of our digital world for half a century. Today, we stand at the threshold of its next evolution.

At Fabric, we empower both cryptographers and cryptography engineers — the innovators and builders — to push boundaries.

Our chip doesn't commit to a single system. Instead, we've accelerated core cryptographic primitives, providing a flexible foundation for transforming breakthrough research into real-world applications.

INVESTORS

With Founders From

INTRODUCING THE VPU

The Next Hardware Paradigm
for Cryptography

The Verifiable Processing Unit (VPU) incorporates the best features of GPUs and ASICs to create a chip whose components exclusively serve cryptographic purposes.

hardware
  • CUSTOM SILICON
    • We break next-gen cryptography algorithms into their common building blocks, achieving the performance of ASICs with the flexibility and programmablity of GPUs.
  • SYSTEM-ON-A-CHIP
    • Our on-chip RISC-V multi-core processor enables native witness generation, eliminating the PCIe bottleneck.
  • BREAKTHROUGH PERFORMANCE
    • We use a non-blocking network-on-chip and high-speed unified memory architecture. Together with our revolutionary core architecture, we achieve order(s) of magnitude boosts above CPU, GPU or FPGA implementations.
  • HYBRID DESIGN
    • We combine best practices from decades designing CPUs, GPUs, domain specific accelerators, and hardware security modules.
SOFTWARE
  • COMPILER + LIBRARIES
    • Our compiler leverages advanced optimization techniques to enhance performance across major algorithms including plonky2, plonky3, GKR, halo2, Jolt/Lasso, Nova, TFHE, and more.
PLATFORM
  • EFFICIENCY
    • Seamless orchestration of tiles and chips across data centers, enabling highly concurrent cryptographic workloads.
  • ACCESSIBILITY
    • Our cloud offering democratizes access to advanced cryptographic operations, even without hardware at home.

A Custom Instruction Set,
Just for Cryptography

Our instruction set is carefully crafted to balance extreme speed for today's workloads, and flexibility for tomorrow's workloads.

  • FINITE-FIELD ARITHMETIC
    • Hundreds of number theory units accelerate modular arithmetic with precision ranging from 32 bits to 384 bits.
    • Specialized instructions are written for easy primes (like Goldilocks), and general instructions for Barrett reduction for arbitrary primes.
  • OPTIMIZED PRIMITIVES
    • Custom instructions are designed to accelerate even the most complex hash functions.
    • Hand-optimized logic are designed to be reused, and openly optimized by our software community.
  • SW-DEFINED DATA MOVEMENT
    • Scratchpad memory controlled by software lets programmers fine-tune workload performance in new ways.
    • High-speed memory access and our network-on-chip unlock bandwidth limits to performance.

LITEPAPER

Looking for an introduction to Fabric?

Stay tuned! We are giving an overview of our founding thesis, the VPU architecture, and our vision for the future.

Coming Soon!

FC 1000

End-to-end acceleration with ultra-wide vector lanes, 40 tiles and RISC-V on every chip. High bandwidth, unified memory architecture.  

VPU 8060

3 FC 1000 chips per card. Nearly 1 TB/s of memory bandwidth to 30 GB of memory. Lovingly known as the "Bit Smasher".

BYTE SMASHER

Up to 8 VPU 8060 cards per server. >1 TB/s of recursion-friendly arithmetic hashing per box. A byte's worst nightmare.   

SOFTWARE
EMPOWERING
CRYPTOGRAPHERS

We believe cryptographers and developers should be given the freedom to design products without having to think about how they’re accelerated. We’re providing an LLVM-based compiler and a reconfigurable library of primitives that they can stitch together into anything they want.

AI HW is our FOUNDATION.
Cryptography
is our FUTURE.

Our powerhouse team unites GPU and AI chip architects, software and compiler experts, and veteran cryptographers — all with a decade plus of industry experience.

Our edge: Codesign. Fabric's software, hardware, and cryptography experts collaborate from day one to create breakthrough solutions for programmable trust.

Open Roles

Leadership

MICHAEL GAO

FOUNDER & CEO

Founder, CSO & Chief Architect of Luminous, a photonic AI chip startup backed by Bill Gates. US Math Olympiad winner. MIT dropout. Bitcoin OG.

TINA JU

FOUNDER & CSO

Co-inventor of the first MERS-CoV antibody treatment & founder of the first university BioMaker space. Ontology, strategy, vibes. BioE -> Math @ Stanford.

SAGAR REDDY

FOUNDER & VP, SILICON

Founder & CTO of DXCorr, 200+ engineers, 100s of custom IP blocks and 70+ full chip tape-outs down to 2nm.

GILBERT HENDRY

VP, SOFTWARE

VP SW at Lightelligence, a photonic AI startup. SW/HW co-design expert. AI leader at Meta, Google, Microsoft. EE PhD @ Columbia

YURI BUKHAN

VP, GROWTH

Head of BD / Partnerships at SaaS unicorns Sentry.io, Twilio, Cloudera. 15+ yrs exp driving deep technical partnerships. CS @ Stanford.

FRED RUSH

DIRECTOR, FRONTEND DESIGN

Expert in building first in market chips, shipping >10 million parts a week. Hardware security with 25+ years experience.

BRIAN ARNOLD

DIRECTOR, BACKEND DESIGN

Leader of high performing, int’l teams down to 5nm designs from AI to cars to medicine. With 35+ years of experience and 25+ tapeouts. 

THOMAS DE CNUDDE

CRYPTOGRAPHY LEAD

Cryptography HW engineer with 10+ years experience. Previously Entrepreneur First & HW Lead at Zama. PhD in Cryptography @ KULeuven.

SEAN HACKETT

DIRECTOR, STRATEGY

CEO & Founder of Radical Semiconductor. Brand, product, and scientific research. BS Physics @ Stanford.

ABE PENUELAS

HEAD OF TALENT

Architect of world-class teams that aim to redefine physical industries. Trusted by Meta, NVIDIA, Luminous and others.

Board DIRECTORS

HERBERT CHANG

BOARD DIRECTOR

Founding partner of InveStar, first semiconductor VC fund backed by TSMC. Board Director at Monolithic Power Systems & Alchip.

YUAN HAN LI

BOARD DIRECTOR

Investor at Blockchain Capital. Former President of Penn Blockchain. Investor in RISC Zero, Eigenlayer, and Blocknative.

WEI DAI

BOARD DIRECTOR

Research partner at 1kx. Cryptographer, startup advisor, and formerly research partner at Bain Capital Crypto. PhD in Cryptography from UC San Diego.

LATEST STORIES

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